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Searched refs:AT91_PMC_MCR_V2 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/at91/
A Dclk-master.c795 regmap_write(master->regmap, AT91_PMC_MCR_V2, in clk_sama7g5_master_set()
797 regmap_read(master->regmap, AT91_PMC_MCR_V2, &val); in clk_sama7g5_master_set()
798 regmap_update_bits(master->regmap, AT91_PMC_MCR_V2, in clk_sama7g5_master_set()
829 regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id); in clk_sama7g5_master_disable()
830 regmap_update_bits(master->regmap, AT91_PMC_MCR_V2, in clk_sama7g5_master_disable()
847 regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id); in clk_sama7g5_master_is_enabled()
848 regmap_read(master->regmap, AT91_PMC_MCR_V2, &val); in clk_sama7g5_master_is_enabled()
948 regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id); in at91_clk_sama7g5_register_master()
949 regmap_read(master->regmap, AT91_PMC_MCR_V2, &val); in at91_clk_sama7g5_register_master()
/linux/arch/arm/mach-at91/
A Dpm_suspend.S812 str tmp1, [pmc, #AT91_PMC_MCR_V2]
813 ldr tmp2, [pmc, #AT91_PMC_MCR_V2]
842 str tmp2, [pmc, #AT91_PMC_MCR_V2]
890 str tmp1, [pmc, #AT91_PMC_MCR_V2]
891 ldr tmp3, [pmc, #AT91_PMC_MCR_V2]
900 str tmp2, [pmc, #AT91_PMC_MCR_V2]
/linux/include/linux/clk/
A Dat91_pmc.h140 #define AT91_PMC_MCR_V2 0x30 /* Master Clock Register [SAMA7G5 only] */ macro

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