| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
| A D | irq_service_dcn201.c | 147 #undef BASE_INNER
148 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
150 #define BASE(seg) BASE_INNER(seg)
154 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| A D | hw_factory_dcn21.c | 50 #undef BASE_INNER
51 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
53 #define BASE(seg) BASE_INNER(seg)
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| A D | hw_translate_dcn21.c | 49 #undef BASE_INNER
50 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| A D | hw_factory_dcn20.c | 52 #undef BASE_INNER
53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
55 #define BASE(seg) BASE_INNER(seg)
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| A D | hw_translate_dcn20.c | 49 #undef BASE_INNER
50 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| A D | hw_factory_dcn30.c | 60 #undef BASE_INNER
61 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
63 #define BASE(seg) BASE_INNER(seg)
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| A D | hw_translate_dcn30.c | 55 #undef BASE_INNER
56 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
58 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_vmid.h | 31 #define BASE_INNER(seg) \ macro
35 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
| A D | irq_service_dcn303.c | 99 #undef BASE_INNER
100 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
103 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| A D | hw_factory_dce120.c | 53 #define BASE_INNER(seg) \ macro
58 BASE_INNER(seg)
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| A D | hw_translate_dce120.c | 44 #define BASE_INNER(seg) \ macro
49 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| A D | irq_service_dcn20.c | 217 #undef BASE_INNER
218 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
222 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
| A D | irq_service_dcn30.c | 206 #undef BASE_INNER
207 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
211 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
| A D | irq_service_dcn302.c | 181 #undef BASE_INNER
182 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
185 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
| A D | irq_service_dcn31.c | 194 #undef BASE_INNER
195 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
199 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| A D | hw_factory_dcn10.c | 50 #define BASE_INNER(seg) \ macro
55 BASE_INNER(seg)
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| A D | hw_translate_dcn10.c | 44 #define BASE_INNER(seg) \ macro
49 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| A D | irq_service_dcn21.c | 225 #undef BASE_INNER
226 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
230 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn301.c | 34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
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| A D | dmub_dcn302.c | 34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
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| A D | dmub_dcn303.c | 16 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
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| A D | dmub_dcn21.c | 34 #define BASE_INNER(seg) DMU_BASE__INST0_SEG##seg macro
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| A D | irq_service_dce120.c | 94 #define BASE_INNER(seg) \ macro
98 BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 45 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
47 #define BASE(seg) BASE_INNER(seg)
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| A D | irq_service_dcn10.c | 192 #define BASE_INNER(seg) \ macro
196 BASE_INNER(seg)
|