Home
last modified time | relevance | path

Searched refs:BCS0 (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
A Dmmio_context.c70 {BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
71 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
72 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
73 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
74 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
126 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
127 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
128 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
159 [BCS0] = 0xcc00,
346 [BCS0] = 0x426c,
[all …]
A Dexeclist.c50 [BCS0] = BCS_AS_CONTEXT_SWITCH,
A Dcmd_parser.c425 #define R_BCS BIT(BCS0)
615 [BCS0] = {
1048 if (s->engine->id == BCS0 && in cmd_handler_lri()
1153 [BCS0] = {
A Dscheduler.c167 } else if (workload->engine->id == BCS0) in populate_shadow_context()
A Dhandlers.c337 engine_mask |= BIT(BCS0); in gdrst_mmio_write()
2088 id = BCS0; in gvt_reg_tlb_control_handler()
/linux/drivers/gpu/drm/i915/
A Di915_pci.c400 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
451 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
524 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
600 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
665 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
747 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
768 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
889 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
907 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) |
1020 BIT(RCS0) | BIT(BCS0) |
[all …]
A Di915_gpu_error.c1202 case BCS0: in engine_record_registers()
/linux/drivers/gpu/drm/i915/gt/
A Dintel_engine_types.h105 BCS0, enumerator
A Dintel_engine_user.c162 [COPY_ENGINE_CLASS] = { BCS0, 1 }, in legacy_ring_idx()
A Dgen8_engine_cs.c280 aux_inv = rq->engine->mask & ~BIT(BCS0); in gen12_emit_flush_xcs()
A Dintel_mocs.c544 [BCS0] = __GEN9_BCS0_MOCS0, in mocs_offset()
A Dintel_reset.c302 [BCS0] = GEN6_GRDOM_BLT, in gen6_reset_engines()
497 [BCS0] = GEN11_GRDOM_BLT, in gen11_reset_engines()
A Dintel_ring_submission.c88 case BCS0: in set_hwsp()
A Dintel_engine_cs.c61 [BCS0] = {
A Dintel_execlists_submission.c3361 [BCS0] = GEN8_BCS_IRQ_SHIFT, in logical_ring_default_irqs()
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_execbuffer.c2305 [I915_EXEC_BLT] = BCS0,

Completed in 52 milliseconds