BIT12 (reference) in projects: linux - OpenGrok search results

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Searched refs:BIT12 (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/staging/rtl8192e/rtl8192e/
A D	r8192E_hw.h	`130 #define RCR_FILTER_MASK (BIT0 \| BIT1 \| BIT2 \| BIT3 \| BIT5 \| BIT12 \| \ 144 #define RCR_AICV BIT12 216 #define IMR_RXFOVW BIT12 243 #define TPPoll_StopVO BIT12 373 #define RRSR_MCS0 BIT12`
/linux/drivers/staging/rtl8723bs/include/
A D	hal_com_reg.h	`620 #define RRSR_MCS0 BIT12 764 #define IMR_RXFOVW BIT12 /* Receive FIFO Overflow / 780 #define IMR_BcnInt_E BIT12 812 #define PHIMR_ATIM_CTW_END BIT12 863 #define UHIMR_CTW_END BIT12 888 #define UHIMR_ATIMEND BIT12 917 #define IMR_ATIMEND_88E BIT12 / CTWidnow End or ATIM Window End / 1011 #define RCR_ACF BIT12 / Accept control type frame. Control frames BA, BAR, and PS-Poll (when …`
A D	rtl8723b_spec.h	`203 #define IMR_ATIMEND_8723B BIT12 /* CTWidnow End or ATIM Window End */`
A D	osdep_service.h	`29 #define BIT12 0x00001000 macro`
A D	rtw_mlme_ext.h	`56 #define DYNAMIC_BB_RXHP BIT12/* ODM_BB_RXHP */`
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
A D	halbt_precomp.h	`43 #define BIT12 0x00001000 macro`
/linux/drivers/staging/rtl8192e/
A D	rtl819x_Qos.h	`22 #define BIT12 0x00001000 macro`
/linux/include/uapi/linux/
A D	synclink.h	`31 #define BIT12 0x1000 macro`
/linux/drivers/staging/rtl8723bs/hal/
A D	Hal8723BReg.h	`392 #define IMR_ATIMEND_8723B BIT12 /* CTWidnow End or ATIM Window End */`
A D	odm.h	`378 ODM_BB_RXHP = BIT12,`
A D	odm_DIG.c	`725 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); in odm_FalseAlarmCounterStatistics()`
/linux/drivers/scsi/
A D	dc395x.h	`64 #define BIT12 0x00001000 macro`
/linux/drivers/tty/
A D	synclink_gt.c	387 #define IRQ_TXIDLE BIT12 4209 case HDLC_ENCODING_BIPHASE_MARK: val \|= BIT12; break; in sync_mode() 4210 case HDLC_ENCODING_BIPHASE_SPACE: val \|= BIT12 + BIT10; break; in sync_mode() 4211 case HDLC_ENCODING_BIPHASE_LEVEL: val \|= BIT12 + BIT11; break; in sync_mode() 4212 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val \|= BIT12 + BIT11 + BIT10; break; in sync_mode() 4282 case HDLC_ENCODING_BIPHASE_MARK: val \|= BIT12; break; in sync_mode() 4283 case HDLC_ENCODING_BIPHASE_SPACE: val \|= BIT12 + BIT10; break; in sync_mode() 4284 case HDLC_ENCODING_BIPHASE_LEVEL: val \|= BIT12 + BIT11; break; in sync_mode() 4285 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val \|= BIT12 + BIT11 + BIT10; break; in sync_mode()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
A D	reg.h	`370 #define RRSR_MCS0 BIT12`
/linux/drivers/scsi/lpfc/
A D	lpfc_hw4.h	`744 #define LPFC_SLI4_INTR12 BIT12`
/linux/drivers/char/pcmcia/
A D	synclink_cs.c	`293 #define IRQ_UNDERRUN BIT12 // transmit data underrun`

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