Searched refs:BIT27 (Results 1 – 12 of 12) sorted by relevance
195 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */217 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
749 #define IMR_BCNDMAINT2 BIT27 /* Beacon DMA Interrupt 2 */797 #define PHIMR_GTINT3 BIT27848 #define UHIMR_GTINT3 BIT27909 #define IMR_GTINT3_88E BIT27 /* When GTIMER3 expires, this bit is set to 1 */932 #define IMR_BCNDMAINT7_88E BIT27 /* Beacon DMA Interrupt 7 */996 #define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the…1558 #define SDIO_HIMR_CTWEND_MSK BIT271584 #define SDIO_HISR_CTWEND BIT27
44 #define BIT27 0x08000000 macro
58 #define BIT27 0x08000000 macro
384 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */406 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
657 …PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_L… in phy_PostSetBwMode8723B()
642 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */ in phy_PathA_RxIQK8723B()922 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */ in phy_PathB_RxIQK8723B()
135 #define RCR_ENMBID BIT27211 #define IMR_TBDOK BIT27
37 #define BIT27 0x08000000 macro
46 #define BIT27 0x08000000 macro
49 #define BIT27 0x08000000 macro
759 #define LPFC_SLI4_INTR27 BIT27
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