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Searched refs:BIT27 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/staging/rtl8723bs/include/
A Drtl8723b_spec.h195 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */
217 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
A Dhal_com_reg.h749 #define IMR_BCNDMAINT2 BIT27 /* Beacon DMA Interrupt 2 */
797 #define PHIMR_GTINT3 BIT27
848 #define UHIMR_GTINT3 BIT27
909 #define IMR_GTINT3_88E BIT27 /* When GTIMER3 expires, this bit is set to 1 */
932 #define IMR_BCNDMAINT7_88E BIT27 /* Beacon DMA Interrupt 7 */
996 #define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the…
1558 #define SDIO_HIMR_CTWEND_MSK BIT27
1584 #define SDIO_HISR_CTWEND BIT27
A Dosdep_service.h44 #define BIT27 0x08000000 macro
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
A Dhalbt_precomp.h58 #define BIT27 0x08000000 macro
/linux/drivers/staging/rtl8723bs/hal/
A DHal8723BReg.h384 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */
406 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
A Drtl8723b_phycfg.c657 …PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_L… in phy_PostSetBwMode8723B()
A DHalPhyRf_8723B.c642 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */ in phy_PathA_RxIQK8723B()
922 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */ in phy_PathB_RxIQK8723B()
/linux/drivers/staging/rtl8192e/rtl8192e/
A Dr8192E_hw.h135 #define RCR_ENMBID BIT27
211 #define IMR_TBDOK BIT27
/linux/drivers/staging/rtl8192e/
A Drtl819x_Qos.h37 #define BIT27 0x08000000 macro
/linux/include/uapi/linux/
A Dsynclink.h46 #define BIT27 0x08000000 macro
/linux/drivers/scsi/
A Ddc395x.h49 #define BIT27 0x08000000 macro
/linux/drivers/scsi/lpfc/
A Dlpfc_hw4.h759 #define LPFC_SLI4_INTR27 BIT27

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