Searched refs:CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 (Results 1 – 9 of 9) sorted by relevance
52 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 0x00010000 macro62 #define AMDGPU_DEFAULT_PCIE_MLW_MASK (CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 \
87 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X1: in get_pcie_lane_support()
5287 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5295 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5302 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5308 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5313 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5317 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5320 adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1; in amdgpu_device_get_pcie_info()
606 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X1: in amdgpu_amdkfd_get_pcie_bandwidth_mbytes()
1248 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu_smc_hw_setup()
514 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega12_override_pcie_parameters()
859 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega20_override_pcie_parameters()
1538 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega10_override_pcie_parameters()
629 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu7_override_pcie_width()
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