Searched refs:CLKID_MPLL0 (Results 1 – 25 of 41) sorted by relevance
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/linux/include/dt-bindings/clock/ |
A D | axg-clkc.h | 20 #define CLKID_MPLL0 11 macro
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A D | meson8b-clkc.h | 100 #define CLKID_MPLL0 93 macro
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A D | gxbb-clkc.h | 19 #define CLKID_MPLL0 13 macro
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A D | g12a-clkc.h | 20 #define CLKID_MPLL0 11 macro
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/linux/arch/arm64/boot/dts/amlogic/ |
A D | meson-gxbb-wetek-hub.dts | 19 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxbb-wetek-play2.dts | 54 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-g12b-gsking-x.dts | 46 <&clkc CLKID_MPLL0>,
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A D | meson-g12b-gtking-pro.dts | 55 <&clkc CLKID_MPLL0>,
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A D | meson-g12b-gtking.dts | 42 <&clkc CLKID_MPLL0>,
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A D | meson-g12b-ugoos-am6.dts | 37 <&clkc CLKID_MPLL0>,
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A D | meson-gxm-nexbox-a1.dts | 90 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxl-s905x-khadas-vim.dts | 70 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxm-rbox-pro.dts | 105 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxl-s905x-libretech-cc-v2.dts | 163 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxbb-nexbox-a95x.dts | 147 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gx-p23x-q20x.dtsi | 133 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxl-s805x-libretech-ac.dts | 126 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxbb-vega-s95.dtsi | 112 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-g12a-radxa-zero.dts | 142 <&clkc CLKID_MPLL0>,
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A D | meson-gxl-s905x-libretech-cc.dts | 145 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gx-libretech-pc.dtsi | 197 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-gxm-khadas-vim2.dts | 152 assigned-clocks = <&clkc CLKID_MPLL0>,
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A D | meson-sm1-odroid.dtsi | 178 <&clkc CLKID_MPLL0>,
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A D | meson-g12a-x96-max.dts | 164 <&clkc CLKID_MPLL0>,
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/linux/Documentation/devicetree/bindings/clock/ |
A D | amlogic,axg-audio-clkc.txt | 41 <&clkc CLKID_MPLL0>,
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