| /linux/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 112 #define CLK_APMIXED_MMPLL 5 macro
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| A D | mt8516-clk.h | 16 #define CLK_APMIXED_MMPLL 3 macro
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| A D | mt6765-clk.h | 15 #define CLK_APMIXED_MMPLL 5 macro
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| A D | mt8173-clk.h | 160 #define CLK_APMIXED_MMPLL 5 macro
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| A D | mt2712-clk.h | 23 #define CLK_APMIXED_MMPLL 11 macro
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| A D | mt6779-clk.h | 174 #define CLK_APMIXED_MMPLL 9 macro
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| A D | mt8183-clk.h | 17 #define CLK_APMIXED_MMPLL 6 macro
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| A D | mt2701-clk.h | 178 #define CLK_APMIXED_MMPLL 4 macro
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| A D | mt8192-clk.h | 305 #define CLK_APMIXED_MMPLL 4 macro
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| A D | mt8195-clk.h | 365 #define CLK_APMIXED_MMPLL 6 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8195-apmixedsys.c | 71 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x00e0, 0x00f0, 0xff000000,
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| A D | clk-mt8135.c | 618 …PLL(CLK_APMIXED_MMPLL, "mmpll", 0x254, 0x26c, 0xf0000001, HAVE_RST_BAR, 21, 0x254, 6, 0x0, 0x258, …
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| A D | clk-mt8516.c | 779 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
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| A D | clk-mt2701.c | 943 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x230, 0x23c, 0x00000001, 0,
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| A D | clk-mt8167.c | 1025 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
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| A D | clk-mt6779.c | 1205 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0280, 0x028C, BIT(0),
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| A D | clk-mt8173.c | 979 …PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x240, 0x24c, 0x00000001, 0, 21, 0x244, 24, 0x0, 0x244, 0, mmpll…
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| A D | clk-mt8183.c | 1146 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0270, 0x027C, 0x00000001,
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| A D | clk-mt8192.c | 1166 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0360, 0x036c, 0xff000000,
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| A D | clk-mt2712.c | 1247 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0250, 0x0260, 0x00000101,
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| A D | clk-mt6765.c | 761 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x025C, 0x0268, BIT(0),
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