Searched refs:CLK_APMIXED_MSDCPLL (Results 1 – 20 of 20) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 113 #define CLK_APMIXED_MSDCPLL 6 macro
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| A D | mt6797-clk.h | 111 #define CLK_APMIXED_MSDCPLL 4 macro
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| A D | mt6765-clk.h | 17 #define CLK_APMIXED_MSDCPLL 7 macro
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| A D | mt8173-clk.h | 161 #define CLK_APMIXED_MSDCPLL 6 macro
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| A D | mt2712-clk.h | 20 #define CLK_APMIXED_MSDCPLL 8 macro
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| A D | mt6779-clk.h | 172 #define CLK_APMIXED_MSDCPLL 7 macro
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| A D | mt8183-clk.h | 16 #define CLK_APMIXED_MSDCPLL 5 macro
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| A D | mt2701-clk.h | 179 #define CLK_APMIXED_MSDCPLL 5 macro
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| A D | mt8192-clk.h | 304 #define CLK_APMIXED_MSDCPLL 3 macro
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| A D | mt8195-clk.h | 362 #define CLK_APMIXED_MSDCPLL 3 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8195-apmixedsys.c | 65 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0710, 0x0720, 0,
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| A D | clk-mt8135.c | 619 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x278, 0x290, 0x80000001, 0, 21, 0x278, 6, 0x0, 0x27c, 0),
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| A D | clk-mt6797.c | 643 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000121, 0, 21,
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| A D | clk-mt2701.c | 945 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x240, 0x24c, 0x00000001, 0,
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| A D | clk-mt6779.c | 1198 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0260, 0x026C, BIT(0),
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| A D | clk-mt8173.c | 980 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x250, 0x25c, 0x00000001, 0, 21, 0x250, 4, 0x0, 0x254, 0),
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| A D | clk-mt8183.c | 1142 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000001,
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| A D | clk-mt8192.c | 1164 PLL_B(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035c, 0x00000000,
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| A D | clk-mt2712.c | 1241 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0270, 0x027C, 0x00000101,
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| A D | clk-mt6765.c | 765 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x027C, 0x0288, BIT(0),
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Completed in 52 milliseconds