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Searched refs:CLK_G3D (Results 1 – 14 of 14) sorted by relevance

/linux/include/dt-bindings/clock/
A Dexynos5250.h152 #define CLK_G3D 349 macro
A Ds5pv210.h112 #define CLK_G3D 94 macro
A Dexynos4.h114 #define CLK_G3D 276 macro
A Dexynos5420.h182 #define CLK_G3D 501 macro
A Dexynos3250.h188 #define CLK_G3D 182 macro
/linux/drivers/clk/samsung/
A Dclk-s5pv210.c630 GATE(CLK_G3D, "g3d", "dout_hclkm", CLK_GATE_IP0, 8, 0, 0),
692 GATE(CLK_G3D, "g3d", "dout_hclkd", CLK_GATE_IP0, 8, 0, 0),
A Dclk-exynos5250.c546 GATE(CLK_G3D, "g3d", "div_aclk400_g3d", GATE_IP_G3D, 0,
A Dclk-exynos3250.c613 GATE(CLK_G3D, "g3d", "div_aclk_200", GATE_IP_G3D, 0, 0, 0),
A Dclk-exynos4.c728 GATE(CLK_G3D, "g3d", "aclk200", GATE_IP_G3D, 0, 0, 0),
A Dclk-exynos5420.c1265 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
/linux/arch/arm/boot/dts/
A Dexynos4.dtsi402 * CLK_G3D is not actually bus clock but a IP-level clock.
405 clocks = <&clock CLK_G3D>,
A Dexynos3250.dtsi482 clocks = <&cmu CLK_G3D>,
A Dexynos5250.dtsi338 clocks = <&clock CLK_G3D>;
A Dexynos5420.dtsi744 clocks = <&clock CLK_G3D>;

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