Searched refs:CLK_IFR_MUX1_SEL (Results 1 – 4 of 4) sorted by relevance
| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8516.dtsi | 57 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
70 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
83 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
96 clocks = <&infracfg CLK_IFR_MUX1_SEL>,
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| /linux/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 23 #define CLK_IFR_MUX1_SEL 0 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 455 MUX(CLK_IFR_MUX1_SEL, "ifr_mux1_sel", ifr_mux1_parents, 0x000,
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| A D | clk-mt8167.c | 645 MUX(CLK_IFR_MUX1_SEL, "ifr_mux1_sel", ifr_mux1_parents, 0x000,
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