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Searched refs:CLK_INFRA_AES_TOP0 (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6797-clk.h187 #define CLK_INFRA_AES_TOP0 67 macro
/linux/drivers/clk/mediatek/
A Dclk-mt6797.c532 GATE_ICG2(CLK_INFRA_AES_TOP0, "infra_aes_top0", "axi_sel", 16),

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