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Searched refs:CLK_INFRA_M4U (Results 1 – 13 of 13) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8135-clk.h128 #define CLK_INFRA_M4U 7 macro
A Dmt8173-clk.h181 #define CLK_INFRA_M4U 6 macro
A Dmt2712-clk.h230 #define CLK_INFRA_M4U 2 macro
A Dmt2701-clk.h205 #define CLK_INFRA_M4U 8 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8135.c419 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
554 clk_prepare_enable(clk_data->clks[CLK_INFRA_M4U]); in mtk_infrasys_init()
A Dclk-mt2701.c720 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
A Dclk-mt8173.c637 GATE_ICG(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
A Dclk-mt2712.c1012 GATE_INFRA(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
/linux/Documentation/devicetree/bindings/iommu/
A Dmediatek,iommu.yaml168 clocks = <&infracfg CLK_INFRA_M4U>;
/linux/arch/arm/boot/dts/
A Dmt7623n.dtsi108 clocks = <&infracfg CLK_INFRA_M4U>;
A Dmt2701.dtsi223 clocks = <&infracfg CLK_INFRA_M4U>;
/linux/arch/arm64/boot/dts/mediatek/
A Dmt2712e.dtsi330 clocks = <&infracfg CLK_INFRA_M4U>;
347 clocks = <&infracfg CLK_INFRA_M4U>;
A Dmt8173.dtsi580 clocks = <&infracfg CLK_INFRA_M4U>;

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