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Searched refs:CLK_INFRA_MUX1_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt7629-clk.h121 #define CLK_INFRA_MUX1_SEL 0 macro
A Dmt7622-clk.h125 #define CLK_INFRA_MUX1_SEL 0 macro
/linux/drivers/clk/mediatek/
A Dclk-mt7629.c481 MUX(CLK_INFRA_MUX1_SEL, "infra_mux1_sel", infra_mux1_parents, 0x000,
A Dclk-mt7622.c509 MUX(CLK_INFRA_MUX1_SEL, "infra_mux1_sel", infra_mux1_parents,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt7622.dtsi75 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,
89 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,

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