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Searched refs:CLK_IPU_CORE0_AXI (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt8183-ipu0.c26 GATE_IPU_CORE0(CLK_IPU_CORE0_AXI, "ipu_core0_axi", "dsp_sel", 1),
/linux/include/dt-bindings/clock/
A Dmt8183-clk.h410 #define CLK_IPU_CORE0_AXI 1 macro

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