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Searched refs:CLK_MM_DISP_OVL0 (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt6765-mm.c39 GATE_MM(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_ck", 7),
A Dclk-mt8183-mm.c56 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
A Dclk-mt8192-mm.c45 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "disp_sel", 2),
A Dclk-mt6779-mm.c56 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
A Dclk-mt6797-mm.c60 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 15),
A Dclk-mt8167-mm.c62 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "smi_mm", 10),
A Dclk-mt8173-mm.c63 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
A Dclk-mt2712-mm.c78 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
/linux/include/dt-bindings/clock/
A Dmt8167-clk.h89 #define CLK_MM_DISP_OVL0 10 macro
A Dmt6797-clk.h230 #define CLK_MM_DISP_OVL0 16 macro
A Dmt6765-clk.h258 #define CLK_MM_DISP_OVL0 7 macro
A Dmt8173-clk.h263 #define CLK_MM_DISP_OVL0 16 macro
A Dmt2712-clk.h317 #define CLK_MM_DISP_OVL0 16 macro
A Dmt6779-clk.h360 #define CLK_MM_DISP_OVL0 20 macro
A Dmt8183-clk.h328 #define CLK_MM_DISP_OVL0 19 macro
A Dmt8192-clk.h426 #define CLK_MM_DISP_OVL0 2 macro
/linux/Documentation/devicetree/bindings/display/mediatek/
A Dmediatek,disp.txt92 clocks = <&mmsys CLK_MM_DISP_OVL0>;
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1071 clocks = <&mmsys CLK_MM_DISP_OVL0>;
A Dmt8183.dtsi1333 clocks = <&mmsys CLK_MM_DISP_OVL0>;

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