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Searched refs:CLK_MM_DISP_PWM1MM (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt8173-mm.c82 GATE_MM1(CLK_MM_DISP_PWM1MM, "mm_disp_pwm1mm", "mm_sel", 2),
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h281 #define CLK_MM_DISP_PWM1MM 34 macro
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1272 <&mmsys CLK_MM_DISP_PWM1MM>;

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