Searched refs:CLK_MM_DISP_RDMA1 (Results 1 – 18 of 18) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8167-clk.h | 91 #define CLK_MM_DISP_RDMA1 12 macro
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| A D | mt6797-clk.h | 235 #define CLK_MM_DISP_RDMA1 21 macro
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| A D | mt8173-clk.h | 266 #define CLK_MM_DISP_RDMA1 19 macro
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| A D | mt2712-clk.h | 320 #define CLK_MM_DISP_RDMA1 19 macro
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| A D | mt6779-clk.h | 364 #define CLK_MM_DISP_RDMA1 24 macro
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| A D | mt8183-clk.h | 332 #define CLK_MM_DISP_RDMA1 23 macro
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| A D | mt2701-clk.h | 372 #define CLK_MM_DISP_RDMA1 20 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt2701-mm.c | 65 GATE_DISP0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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| A D | clk-mt8183-mm.c | 60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
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| A D | clk-mt6779-mm.c | 60 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24),
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| A D | clk-mt6797-mm.c | 65 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 20),
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| A D | clk-mt8167-mm.c | 64 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "smi_mm", 12),
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| A D | clk-mt8173-mm.c | 66 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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| A D | clk-mt2712-mm.c | 81 GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
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| /linux/arch/arm/boot/dts/ |
| A D | mt7623n.dtsi | 216 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| A D | mediatek,disp.txt | 123 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8173.dtsi | 1104 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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| A D | mt8183.dtsi | 1378 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
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