CLK_MM_DISP_SPLIT0 (reference) in projects: linux

Searched refs:CLK_MM_DISP_SPLIT0 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/mediatek/
A D	clk-mt8173-mm.c	`75 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),`
A D	clk-mt2712-mm.c	`90 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),`
/linux/include/dt-bindings/clock/
A D	mt8173-clk.h	`275 #define CLK_MM_DISP_SPLIT0 28 macro`
A D	mt2712-clk.h	`329 #define CLK_MM_DISP_SPLIT0 28 macro`
/linux/arch/arm64/boot/dts/mediatek/
A D	mt8173.dtsi	`1190 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;`

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