Searched refs:CLK_MM_DISP_WDMA1 (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt6797-mm.c | 67 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| A D | clk-mt8173-mm.c | 69 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| A D | clk-mt2712-mm.c | 84 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| /linux/include/dt-bindings/clock/ |
| A D | mt6797-clk.h | 237 #define CLK_MM_DISP_WDMA1 23 macro
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| A D | mt8173-clk.h | 269 #define CLK_MM_DISP_WDMA1 22 macro
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| A D | mt2712-clk.h | 323 #define CLK_MM_DISP_WDMA1 22 macro
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| A D | mediatek,disp.txt | 153 clocks = <&mmsys CLK_MM_DISP_WDMA1>;
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8173.dtsi | 1137 clocks = <&mmsys CLK_MM_DISP_WDMA1>;
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