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Searched refs:CLK_MM_DSI0_ENGINE (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt8173-mm.c84 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
A Dclk-mt2712-mm.c97 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h283 #define CLK_MM_DSI0_ENGINE 36 macro
A Dmt2712-clk.h335 #define CLK_MM_DSI0_ENGINE 34 macro
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1213 clocks = <&mmsys CLK_MM_DSI0_ENGINE>,

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