Searched refs:CLK_MM_MDP_WROT1 (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt6779-mm.c | 54 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 18),
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| A D | clk-mt6797-mm.c | 58 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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| A D | clk-mt8173-mm.c | 60 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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| A D | clk-mt2712-mm.c | 75 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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| /linux/include/dt-bindings/clock/ |
| A D | mt6797-clk.h | 228 #define CLK_MM_MDP_WROT1 14 macro
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| A D | mt8173-clk.h | 260 #define CLK_MM_MDP_WROT1 13 macro
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| A D | mt2712-clk.h | 314 #define CLK_MM_MDP_WROT1 13 macro
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| A D | mt6779-clk.h | 387 #define CLK_MM_MDP_WROT1 47 macro
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| /linux/Documentation/devicetree/bindings/media/ |
| A D | mediatek-mdp.txt | 99 clocks = <&mmsys CLK_MM_MDP_WROT1>;
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8173.dtsi | 1060 clocks = <&mmsys CLK_MM_MDP_WROT1>;
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