/linux/drivers/clk/hisilicon/ |
A D | clk-hi3670.c | 420 0xAC, 0, 1, CLK_MUX_HIWORD_MASK, }, 444 0xAC, 4, 1, CLK_MUX_HIWORD_MASK, }, 447 0xAC, 3, 1, CLK_MUX_HIWORD_MASK, }, 450 0xAC, 2, 1, CLK_MUX_HIWORD_MASK, }, 456 0xAC, 8, 1, CLK_MUX_HIWORD_MASK, }, 459 0xb4, 5, 1, CLK_MUX_HIWORD_MASK, }, 465 0xC8, 8, 4, CLK_MUX_HIWORD_MASK, }, 468 0xC8, 4, 4, CLK_MUX_HIWORD_MASK, }, 785 0x74, 6, 4, CLK_MUX_HIWORD_MASK, }, 788 0x68, 6, 4, CLK_MUX_HIWORD_MASK, }, [all …]
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A D | clk-hi3660.c | 271 CLK_MUX_HIWORD_MASK, }, 274 CLK_MUX_HIWORD_MASK, }, 277 CLK_MUX_HIWORD_MASK, }, 280 CLK_MUX_HIWORD_MASK, }, 283 CLK_MUX_HIWORD_MASK, }, 286 CLK_MUX_HIWORD_MASK, }, 289 CLK_MUX_HIWORD_MASK, }, 292 CLK_MUX_HIWORD_MASK, }, 295 CLK_MUX_HIWORD_MASK, }, 298 CLK_MUX_HIWORD_MASK, }, [all …]
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A D | clk-hi3620.c | 96 … uart0_mux_p, ARRAY_SIZE(uart0_mux_p), CLK_SET_RATE_PARENT, 0x100, 7, 1, CLK_MUX_HIWORD_MASK, }, 97 … uart1_mux_p, ARRAY_SIZE(uart1_mux_p), CLK_SET_RATE_PARENT, 0x100, 8, 1, CLK_MUX_HIWORD_MASK, }, 98 … uart2_mux_p, ARRAY_SIZE(uart2_mux_p), CLK_SET_RATE_PARENT, 0x100, 9, 1, CLK_MUX_HIWORD_MASK, }, 99 … uart3_mux_p, ARRAY_SIZE(uart3_mux_p), CLK_SET_RATE_PARENT, 0x100, 10, 1, CLK_MUX_HIWORD_MASK, }, 100 … uart4_mux_p, ARRAY_SIZE(uart4_mux_p), CLK_SET_RATE_PARENT, 0x100, 11, 1, CLK_MUX_HIWORD_MASK, }, 101 … spi0_mux_p, ARRAY_SIZE(spi0_mux_p), CLK_SET_RATE_PARENT, 0x100, 12, 1, CLK_MUX_HIWORD_MASK, }, 102 … spi1_mux_p, ARRAY_SIZE(spi1_mux_p), CLK_SET_RATE_PARENT, 0x100, 13, 1, CLK_MUX_HIWORD_MASK, }, 103 … spi2_mux_p, ARRAY_SIZE(spi2_mux_p), CLK_SET_RATE_PARENT, 0x100, 14, 1, CLK_MUX_HIWORD_MASK, }, 104 … saxi_mux_p, ARRAY_SIZE(saxi_mux_p), CLK_SET_RATE_PARENT, 0x100, 15, 1, CLK_MUX_HIWORD_MASK, }, 105 … pwm0_mux_p, ARRAY_SIZE(pwm0_mux_p), CLK_SET_RATE_PARENT, 0x104, 10, 1, CLK_MUX_HIWORD_MASK, }, [all …]
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A D | clk-hi6220.c | 156 …fi_src, ARRAY_SIZE(hifi_src), CLK_SET_RATE_PARENT, 0x400, 0, 1, CLK_MUX_HIWORD_MASK,}, 157 …rt1_src, ARRAY_SIZE(uart1_src), CLK_SET_RATE_PARENT, 0x400, 1, 1, CLK_MUX_HIWORD_MASK,}, 158 …rt2_src, ARRAY_SIZE(uart2_src), CLK_SET_RATE_PARENT, 0x400, 2, 1, CLK_MUX_HIWORD_MASK,}, 159 …rt3_src, ARRAY_SIZE(uart3_src), CLK_SET_RATE_PARENT, 0x400, 3, 1, CLK_MUX_HIWORD_MASK,}, 160 …rt4_src, ARRAY_SIZE(uart4_src), CLK_SET_RATE_PARENT, 0x400, 4, 1, CLK_MUX_HIWORD_MASK,}, 161 …c0_mux0_p, ARRAY_SIZE(mmc0_mux0_p), CLK_SET_RATE_PARENT, 0x400, 5, 1, CLK_MUX_HIWORD_MASK,}, 162 …c1_mux0_p, ARRAY_SIZE(mmc1_mux0_p), CLK_SET_RATE_PARENT, 0x400, 11, 1, CLK_MUX_HIWORD_MASK,}, 163 …c2_mux0_p, ARRAY_SIZE(mmc2_mux0_p), CLK_SET_RATE_PARENT, 0x400, 12, 1, CLK_MUX_HIWORD_MASK,}, 164 …c0_mux1_p, ARRAY_SIZE(mmc0_mux1_p), CLK_SET_RATE_PARENT, 0x400, 13, 1, CLK_MUX_HIWORD_MASK,}, 165 …c1_mux1_p, ARRAY_SIZE(mmc1_mux1_p), CLK_SET_RATE_PARENT, 0x400, 14, 1, CLK_MUX_HIWORD_MASK,}, [all …]
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/linux/drivers/clk/ |
A D | clk-mux.c | 111 if (mux->flags & CLK_MUX_HIWORD_MASK) { in clk_mux_set_parent() 163 if (clk_mux_flags & CLK_MUX_HIWORD_MASK) { in __clk_hw_register_mux()
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/linux/drivers/clk/rockchip/ |
A D | clk-muxgrf.c | 44 if (mux->flags & CLK_MUX_HIWORD_MASK) in rockchip_muxgrf_set_parent()
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A D | clk-rk3036.c | 145 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3128.c | 169 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3228.c | 179 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3188.c | 237 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3328.c | 232 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rv1108.c | 162 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-pll.c | 894 pll_mux->flags |= CLK_MUX_HIWORD_MASK; in rockchip_clk_register_pll()
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A D | clk-rk3368.c | 151 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3288.c | 245 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-px30.c | 204 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3308.c | 194 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3399.c | 240 #define MFLAGS CLK_MUX_HIWORD_MASK
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A D | clk-rk3568.c | 335 #define MFLAGS CLK_MUX_HIWORD_MASK
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/linux/drivers/clk/zynqmp/ |
A D | clk-mux-zynqmp.c | 109 ccf_flag |= CLK_MUX_HIWORD_MASK; in zynqmp_clk_map_mux_ccf_flags()
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/linux/drivers/clk/ti/ |
A D | mux.c | 81 if (mux->flags & CLK_MUX_HIWORD_MASK) { in ti_clk_mux_set_parent()
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/linux/drivers/clk/renesas/ |
A D | r9a07g044-cpg.c | 126 sel_pll6_2, ARRAY_SIZE(sel_pll6_2), 0, CLK_MUX_HIWORD_MASK),
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/linux/include/linux/ |
A D | clk-provider.h | 879 #define CLK_MUX_HIWORD_MASK BIT(2) macro
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