Searched refs:CLK_PERI_PWM5 (Results 1 – 11 of 11) sorted by relevance
/linux/include/dt-bindings/clock/ |
A D | mt8135-clk.h | 164 #define CLK_PERI_PWM5 26 macro
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A D | mt8173-clk.h | 200 #define CLK_PERI_PWM5 7 macro
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A D | mt2712-clk.h | 246 #define CLK_PERI_PWM5 7 macro
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A D | mt2701-clk.h | 228 #define CLK_PERI_PWM5 7 macro
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/linux/Documentation/devicetree/bindings/pwm/ |
A D | pwm-mediatek.txt | 43 <&pericfg CLK_PERI_PWM5>;
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8135.c | 485 GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axi_sel", 6),
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A D | clk-mt2701.c | 848 GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axisel_d4", 6),
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A D | clk-mt8173.c | 687 GATE_PERI0(CLK_PERI_PWM5, "peri_pwm5", "axi_sel", 6),
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A D | clk-mt2712.c | 1080 GATE_PERI0(CLK_PERI_PWM5, "per_pwm5",
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt2712e.dtsi | 487 <&pericfg CLK_PERI_PWM5>,
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/linux/arch/arm/boot/dts/ |
A D | mt7623.dtsi | 430 <&pericfg CLK_PERI_PWM5>;
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