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Searched refs:CLK_PERI_SPI0 (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/spi/
A Dspi-mt65xx.txt37 The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
64 <&pericfg CLK_PERI_SPI0>;
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h223 #define CLK_PERI_SPI0 30 macro
A Dmt2712-clk.h265 #define CLK_PERI_SPI0 26 macro
A Dmt2701-clk.h251 #define CLK_PERI_SPI0 30 macro
/linux/drivers/clk/mediatek/
A Dclk-mt2701.c825 GATE_PERI0(CLK_PERI_SPI0, "spi0_ck", "spi0_sel", 29),
A Dclk-mt8173.c710 GATE_PERI0(CLK_PERI_SPI0, "peri_spi0", "spi_sel", 29),
A Dclk-mt2712.c1118 GATE_PERI0(CLK_PERI_SPI0, "per_spi0",
/linux/arch/arm/boot/dts/
A Dmt2701.dtsi345 <&pericfg CLK_PERI_SPI0>;
A Dmt7623.dtsi490 <&pericfg CLK_PERI_SPI0>;
/linux/arch/arm64/boot/dts/mediatek/
A Dmt2712e.dtsi556 <&pericfg CLK_PERI_SPI0>;
A Dmt8173.dtsi762 <&pericfg CLK_PERI_SPI0>;

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