Searched refs:CLK_PERI_UART0 (Results 1 – 12 of 12) sorted by relevance
/linux/include/dt-bindings/clock/ |
A D | mt8135-clk.h | 148 #define CLK_PERI_UART0 10 macro
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A D | mt8173-clk.h | 213 #define CLK_PERI_UART0 20 macro
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A D | mt2712-clk.h | 255 #define CLK_PERI_UART0 16 macro
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A D | mt2701-clk.h | 241 #define CLK_PERI_UART0 20 macro
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/linux/arch/arm/boot/dts/ |
A D | mt8135.dtsi | 227 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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A D | mt2701.dtsi | 260 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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A D | mt7623.dtsi | 382 <&pericfg CLK_PERI_UART0>;
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8135.c | 469 GATE_PERI0(CLK_PERI_UART0, "uart0_ck", "axi_sel", 22),
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A D | clk-mt2701.c | 835 GATE_PERI0(CLK_PERI_UART0, "uart0_ck", "axi_sel", 19),
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A D | clk-mt8173.c | 700 GATE_PERI0(CLK_PERI_UART0, "peri_uart0", "axi_sel", 19),
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A D | clk-mt2712.c | 1098 GATE_PERI0(CLK_PERI_UART0, "per_uart0",
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8173.dtsi | 671 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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