Searched refs:CLK_PERI_UART0_SEL (Results 1 – 10 of 10) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 180 #define CLK_PERI_UART0_SEL 42 macro
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| A D | mt8173-clk.h | 229 #define CLK_PERI_UART0_SEL 36 macro
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| A D | mt2701-clk.h | 268 #define CLK_PERI_UART0_SEL 45 macro
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| /linux/arch/arm/boot/dts/ |
| A D | mt8135.dtsi | 227 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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| A D | mt2701.dtsi | 260 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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| A D | mt7623.dtsi | 381 clocks = <&pericfg CLK_PERI_UART0_SEL>,
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8135.c | 510 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
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| A D | clk-mt2701.c | 876 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents,
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| A D | clk-mt8173.c | 725 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8173.dtsi | 671 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
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