Searched refs:CLK_PERI_UART2 (Results 1 – 12 of 12) sorted by relevance
/linux/include/dt-bindings/clock/ |
A D | mt8135-clk.h | 146 #define CLK_PERI_UART2 8 macro
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A D | mt8173-clk.h | 215 #define CLK_PERI_UART2 22 macro
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A D | mt2712-clk.h | 257 #define CLK_PERI_UART2 18 macro
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A D | mt2701-clk.h | 243 #define CLK_PERI_UART2 22 macro
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/linux/arch/arm/boot/dts/ |
A D | mt8135.dtsi | 245 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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A D | mt2701.dtsi | 280 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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A D | mt7623.dtsi | 404 <&pericfg CLK_PERI_UART2>;
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8135.c | 467 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
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A D | clk-mt2701.c | 833 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 21),
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A D | clk-mt8173.c | 702 GATE_PERI0(CLK_PERI_UART2, "peri_uart2", "axi_sel", 21),
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A D | clk-mt2712.c | 1102 GATE_PERI0(CLK_PERI_UART2, "per_uart2",
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8173.dtsi | 691 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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