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Searched refs:CLK_SCLK_SPI1 (Results 1 – 17 of 17) sorted by relevance

/linux/include/dt-bindings/clock/
A Dexynos5250.h51 #define CLK_SCLK_SPI1 155 macro
A Dexynos7-clk.h42 #define CLK_SCLK_SPI1 8 macro
A Dexynos4.h73 #define CLK_SCLK_SPI1 160 macro
A Dexynos5420.h37 #define CLK_SCLK_SPI1 136 macro
A Dexynos3250.h252 #define CLK_SCLK_SPI1 244 macro
A Dexynos5433.h433 #define CLK_SCLK_SPI1 32 macro
/linux/drivers/clk/samsung/
A Dclk-exynos5250.c510 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi_pre1",
A Dclk-exynos3250.c558 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi1_pre",
A Dclk-exynos7.c350 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_sclk_spi1",
A Dclk-exynos4.c791 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi_pre1", SRC_MASK_PERIL1, 20,
A Dclk-exynos5420.c989 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_spi1_pre",
A Dclk-exynos5433.c1713 GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,
/linux/arch/arm/boot/dts/
A Dexynos3250.dtsi671 clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
A Dexynos4.dtsi636 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
A Dexynos5250.dtsi520 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
A Dexynos5420.dtsi577 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
/linux/arch/arm64/boot/dts/exynos/
A Dexynos5433.dtsi1481 <&cmu_peric CLK_SCLK_SPI1>,

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