Searched refs:CLK_SDMMC0 (Results 1 – 12 of 12) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | exynos5250.h | 83 #define CLK_SDMMC0 280 macro
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| A D | exynos4.h | 135 #define CLK_SDMMC0 297 macro
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| A D | exynos3250.h | 205 #define CLK_SDMMC0 199 macro
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| A D | rk3568-cru.h | 240 #define CLK_SDMMC0 177 macro
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| /linux/drivers/clk/samsung/ |
| A D | clk-exynos5250.c | 561 GATE(CLK_SDMMC0, "sdmmc0", "div_aclk200", GATE_IP_FSYS, 12, 0, 0),
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| A D | clk-exynos3250.c | 645 GATE(CLK_SDMMC0, "sdmmc0", "div_aclk_200", GATE_IP_FSYS, 5, 0, 0),
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| A D | clk-exynos4.c | 839 GATE(CLK_SDMMC0, "sdmmc0", "aclk133", GATE_IP_FSYS, 5,
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| /linux/arch/arm/boot/dts/ |
| A D | exynos3250.dtsi | 382 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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| A D | exynos4.dtsi | 323 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| A D | exynos5250.dtsi | 548 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| /linux/arch/arm64/boot/dts/rockchip/ |
| A D | rk356x.dtsi | 574 clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>,
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| /linux/drivers/clk/rockchip/ |
| A D | clk-rk3568.c | 882 COMPOSITE_NODIV(CLK_SDMMC0, "clk_sdmmc0", clk_sdmmc_p, 0,
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