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Searched refs:CLK_SET_RATE_GATE (Results 1 – 25 of 73) sorted by relevance

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/linux/drivers/clk/ux500/
A Du8500_of_clk.c156 CLK_SET_RATE_GATE); in u8500_clk_init()
163 CLK_SET_RATE_GATE); in u8500_clk_init()
167 CLK_SET_RATE_GATE); in u8500_clk_init()
171 CLK_SET_RATE_GATE); in u8500_clk_init()
178 CLK_SET_RATE_GATE); in u8500_clk_init()
197 CLK_SET_RATE_GATE); in u8500_clk_init()
216 100000000, CLK_SET_RATE_GATE); in u8500_clk_init()
220 PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
224 PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
228 PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
[all …]
/linux/drivers/clk/baikal-t1/
A Dclk-ccu-div.c141 CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
145 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
148 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
169 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN)
193 CLK_SET_RATE_GATE,
215 CLK_SET_RATE_GATE, 0),
218 CLK_SET_RATE_GATE, 0),
221 CLK_SET_RATE_GATE, 0),
230 CLK_SET_RATE_GATE, 0),
233 CLK_SET_RATE_GATE, 0),
[all …]
A Dclk-ccu-pll.c66 CLK_IS_CRITICAL | CLK_SET_RATE_GATE),
68 CLK_IS_CRITICAL | CLK_SET_RATE_GATE),
72 CLK_IS_CRITICAL | CLK_SET_RATE_GATE)
A Dccu-div.c425 num += !!(div->flags & CLK_SET_RATE_GATE) + in ccu_div_var_debug_init()
434 if (!(div->flags & CLK_SET_RATE_GATE) && in ccu_div_var_debug_init()
561 if (hw_init.flags & CLK_SET_RATE_GATE) in ccu_div_hw_register()
/linux/drivers/clk/at91/
A Dsam9x60.c234 CLK_IS_CRITICAL | CLK_SET_RATE_GATE); in sam9x60_pmc_setup()
245 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0); in sam9x60_pmc_setup()
254 &pll_frac_layout, CLK_SET_RATE_GATE); in sam9x60_pmc_setup()
261 CLK_SET_RATE_GATE | in sam9x60_pmc_setup()
275 CLK_SET_RATE_GATE, INT_MIN); in sam9x60_pmc_setup()
282 CLK_SET_RATE_GATE, 0); in sam9x60_pmc_setup()
A Dsama7g5.c181 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, },
192 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
206 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, },
214 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, },
223 .f = CLK_SET_RATE_GATE, },
230 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
240 .f = CLK_SET_RATE_GATE, },
247 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
257 .f = CLK_SET_RATE_GATE, },
264 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
[all …]
A Dat91sam9rl.c126 &sam9rl_mck_lock, CLK_SET_RATE_GATE, in at91sam9rl_pmc_setup()
135 &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0); in at91sam9rl_pmc_setup()
A Dat91rm9200.c146 &rm9200_mck_lock, CLK_SET_RATE_GATE, in at91rm9200_pmc_setup()
155 &rm9200_mck_lock, CLK_SET_RATE_GATE, 0); in at91rm9200_pmc_setup()
A Dat91sam9g45.c158 CLK_SET_RATE_GATE, INT_MIN); in at91sam9g45_pmc_setup()
167 CLK_SET_RATE_GATE, 0); in at91sam9g45_pmc_setup()
A Dat91sam9n12.c185 CLK_SET_RATE_GATE, INT_MIN); in at91sam9n12_pmc_setup()
194 CLK_SET_RATE_GATE, 0); in at91sam9n12_pmc_setup()
A Dclk-audio-pll.c467 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_audio_pll_frac()
497 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pad()
528 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pmc()
A Dsama5d3.c179 CLK_SET_RATE_GATE, INT_MIN); in sama5d3_pmc_setup()
187 CLK_SET_RATE_GATE, 0); in sama5d3_pmc_setup()
A Dsama5d4.c194 CLK_SET_RATE_GATE, INT_MIN); in sama5d4_pmc_setup()
202 CLK_SET_RATE_GATE, 0); in sama5d4_pmc_setup()
A Dat91sam9x5.c205 CLK_SET_RATE_GATE, INT_MIN); in at91sam9x5_pmc_setup()
213 CLK_SET_RATE_GATE, 0); in at91sam9x5_pmc_setup()
/linux/drivers/clk/qcom/
A Dlcc-mdm9615.c119 .flags = CLK_SET_RATE_GATE,
225 .flags = CLK_SET_RATE_GATE, \
369 .flags = CLK_SET_RATE_GATE,
437 .flags = CLK_SET_RATE_GATE,
A Dlcc-msm8960.c117 .flags = CLK_SET_RATE_GATE,
223 .flags = CLK_SET_RATE_GATE, \
367 .flags = CLK_SET_RATE_GATE,
435 .flags = CLK_SET_RATE_GATE,
A Dlcc-ipq806x.c136 .flags = CLK_SET_RATE_GATE,
250 .flags = CLK_SET_RATE_GATE,
330 .flags = CLK_SET_RATE_GATE,
A Dgcc-mdm9615.c779 .flags = CLK_SET_RATE_GATE,
828 .flags = CLK_SET_RATE_GATE,
1043 .flags = CLK_SET_RATE_GATE,
1092 .flags = CLK_SET_RATE_GATE,
1147 .flags = CLK_SET_RATE_GATE,
1202 .flags = CLK_SET_RATE_GATE,
1257 .flags = CLK_SET_RATE_GATE,
A Dgcc-ipq806x.c1131 .flags = CLK_SET_RATE_GATE,
1180 .flags = CLK_SET_RATE_GATE,
1589 .flags = CLK_SET_RATE_GATE,
1681 .flags = CLK_SET_RATE_GATE,
1773 .flags = CLK_SET_RATE_GATE,
1870 .flags = CLK_SET_RATE_GATE,
2007 .flags = CLK_SET_RATE_GATE,
2077 .flags = CLK_SET_RATE_GATE,
2147 .flags = CLK_SET_RATE_GATE,
2211 .flags = CLK_SET_RATE_GATE,
A Dgcc-msm8960.c1619 .flags = CLK_SET_RATE_GATE,
1668 .flags = CLK_SET_RATE_GATE,
2027 .flags = CLK_SET_RATE_GATE,
2081 .flags = CLK_SET_RATE_GATE,
2130 .flags = CLK_SET_RATE_GATE,
2179 .flags = CLK_SET_RATE_GATE,
2228 .flags = CLK_SET_RATE_GATE,
2323 .flags = CLK_SET_RATE_GATE,
2390 .flags = CLK_SET_RATE_GATE,
2878 .flags = CLK_SET_RATE_GATE,
[all …]
/linux/drivers/clk/imx/
A Dclk-pfdv2.c227 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT; in imx_clk_hw_pfdv2()
229 init.flags = CLK_SET_RATE_GATE; in imx_clk_hw_pfdv2()
A Dclk-imx7ulp.c77 … = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x508, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
78 … = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
102 …SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x60… in imx7ulp_clk_scg1_init()
A Dclk-imx6sll.c176 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
178 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock); in imx6sll_clocks_init()
180 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
182 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
/linux/drivers/clk/h8300/
A Dclk-div.c44 CLK_SET_RATE_GATE, divcr, offset, width, in h8300_div_clk_setup()
/linux/drivers/clk/
A Dclk-fsl-sai.c67 CLK_SET_RATE_GATE); in fsl_sai_clk_probe()

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