Searched refs:CLK_SMMU_MFCL (Results 1 – 9 of 9) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | exynos5250.h | 70 #define CLK_SMMU_MFCL 267 macro
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| A D | exynos4.h | 112 #define CLK_SMMU_MFCL 274 macro
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| A D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| /linux/drivers/clk/samsung/ |
| A D | clk-exynos5250.c | 544 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "mout_aclk333_sub", GATE_IP_MFC, 2, 0,
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| A D | clk-exynos4.c | 824 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk100", GATE_IP_MFC, 1,
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| A D | clk-exynos5420.c | 1280 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "dout_mfc_blk", GATE_IP_MFC, 1, 0, 0),
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| /linux/arch/arm/boot/dts/ |
| A D | exynos4.dtsi | 893 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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| A D | exynos5250.dtsi | 889 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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| A D | exynos5420.dtsi | 1042 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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Completed in 17 milliseconds