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Searched refs:CLK_SYSREG (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
A Dexynos5250.h122 #define CLK_SYSREG 319 macro
A Dexynos4.h180 #define CLK_SYSREG 342 macro
A Dexynos5420.h95 #define CLK_SYSREG 302 macro
A Dexynos3250.h164 #define CLK_SYSREG 158 macro
/linux/drivers/clk/samsung/
A Dclk-exynos4.c931 GATE(CLK_SYSREG, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
973 GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
A Dclk-exynos5250.c604 GATE(CLK_SYSREG, "sysreg", "div_aclk66",
A Dclk-exynos3250.c499 GATE(CLK_SYSREG, "sysreg", "div_aclk_100", GATE_IP_PERIR, 1,
A Dclk-exynos5420.c1110 GATE(CLK_SYSREG, "sysreg", "aclk66_psgen",

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