Home
last modified time | relevance | path

Searched refs:CLK_TOP_APLL12_DIV1 (Results 1 – 18 of 18) sorted by relevance

/linux/sound/soc/mediatek/mt8183/
A Dmt8183-afe-clk.c45 CLK_TOP_APLL12_DIV1, enumerator
84 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
518 .div_clk_id = CLK_TOP_APLL12_DIV1,
/linux/include/dt-bindings/clock/
A Dmt8516-clk.h152 #define CLK_TOP_APLL12_DIV1 120 macro
A Dmt6765-clk.h114 #define CLK_TOP_APLL12_DIV1 79 macro
A Dmt6779-clk.h139 #define CLK_TOP_APLL12_DIV1 129 macro
A Dmt8183-clk.h159 #define CLK_TOP_APLL12_DIV1 123 macro
A Dmt8192-clk.h155 #define CLK_TOP_APLL12_DIV1 143 macro
A Dmt8195-clk.h231 #define CLK_TOP_APLL12_DIV1 219 macro
/linux/sound/soc/mediatek/mt8192/
A Dmt8192-afe-clk.h207 CLK_TOP_APLL12_DIV1, enumerator
A Dmt8192-afe-clk.c50 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
439 .div_clk_id = CLK_TOP_APLL12_DIV1,
/linux/Documentation/devicetree/bindings/sound/
A Dmt8195-afe-pcm.yaml146 <&topckgen 234>, //CLK_TOP_APLL12_DIV1
/linux/drivers/clk/mediatek/
A Dclk-mt8516.c667 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
A Dclk-mt8195-topckgen.c1159 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "top_i2si2_mck", 0x0320, 1, 0x0328, 8, 8),
A Dclk-mt8167.c913 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
A Dclk-mt6779.c830 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "i2s1_m_ck_sel",
A Dclk-mt8183.c738 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel",
A Dclk-mt8192.c862 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_m_sel", 0x320, 1, 0x328, 8, 8),
A Dclk-mt6765.c532 GATE_TOP2(CLK_TOP_APLL12_DIV1, "apll12_div1", "aud_1_ck", 3),
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8183.dtsi1164 <&topckgen CLK_TOP_APLL12_DIV1>,

Completed in 39 milliseconds