Searched refs:CLK_TOP_APLL12_DIV4 (Results 1 – 15 of 15) sorted by relevance
/linux/sound/soc/mediatek/mt8183/ |
A D | mt8183-afe-clk.c | 48 CLK_TOP_APLL12_DIV4, enumerator 87 [CLK_TOP_APLL12_DIV4] = "top_apll12_div4", 530 .div_clk_id = CLK_TOP_APLL12_DIV4,
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/linux/include/dt-bindings/clock/ |
A D | mt8516-clk.h | 155 #define CLK_TOP_APLL12_DIV4 123 macro
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A D | mt6779-clk.h | 142 #define CLK_TOP_APLL12_DIV4 132 macro
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A D | mt8183-clk.h | 162 #define CLK_TOP_APLL12_DIV4 126 macro
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A D | mt8192-clk.h | 158 #define CLK_TOP_APLL12_DIV4 146 macro
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A D | mt8195-clk.h | 234 #define CLK_TOP_APLL12_DIV4 222 macro
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/linux/sound/soc/mediatek/mt8192/ |
A D | mt8192-afe-clk.h | 210 CLK_TOP_APLL12_DIV4, enumerator
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A D | mt8192-afe-clk.c | 53 [CLK_TOP_APLL12_DIV4] = "top_apll12_div4", 478 .div_clk_id = CLK_TOP_APLL12_DIV4,
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8516.c | 670 GATE_TOP5(CLK_TOP_APLL12_DIV4, "apll12_div4", "apll12_ck_div4", 4),
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A D | clk-mt8195-topckgen.c | 1162 DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "top_aud_iec_clk", 0x0320, 4, 0x0334, 8, 0),
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A D | clk-mt8167.c | 916 GATE_TOP5(CLK_TOP_APLL12_DIV4, "apll12_div4", "apll12_ck_div4", 4),
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A D | clk-mt6779.c | 836 DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "i2s4_m_ck_sel",
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A D | clk-mt8183.c | 744 DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "apll_i2s4_sel",
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A D | clk-mt8192.c | 865 DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "apll_i2s4_m_sel", 0x320, 4, 0x334, 8, 0),
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8183.dtsi | 1167 <&topckgen CLK_TOP_APLL12_DIV4>,
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