Searched refs:CLK_TOP_APLL12_DIV9 (Results 1 – 7 of 7) sorted by relevance
| /linux/sound/soc/mediatek/mt8192/ |
| A D | mt8192-afe-clk.h | 216 CLK_TOP_APLL12_DIV9, enumerator
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| A D | mt8192-afe-clk.c | 59 [CLK_TOP_APLL12_DIV9] = "top_apll12_div9",
553 .div_clk_id = CLK_TOP_APLL12_DIV9,
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| /linux/include/dt-bindings/clock/ |
| A D | mt8192-clk.h | 164 #define CLK_TOP_APLL12_DIV9 152 macro
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| A D | mt8195-clk.h | 235 #define CLK_TOP_APLL12_DIV9 223 macro
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| /linux/Documentation/devicetree/bindings/sound/ |
| A D | mt8195-afe-pcm.yaml | 149 <&topckgen 238>, //CLK_TOP_APLL12_DIV9
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8195-topckgen.c | 1164 DIV_GATE(CLK_TOP_APLL12_DIV9, "apll12_div9", "top_dptx_mck", 0x0320, 9, 0x0338, 8, 8),
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| A D | clk-mt8192.c | 871 DIV_GATE(CLK_TOP_APLL12_DIV9, "apll12_div9", "apll_i2s9_m_sel", 0x320, 10, 0x338, 8, 16),
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