Searched refs:CLK_TOP_APLL1_DIV_PD (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt7622-clk.h	113 #define CLK_TOP_APLL1_DIV_PD 101 macro
/linux/drivers/clk/mediatek/
A D	clk-mt7622.c	438 GATE_TOP0(CLK_TOP_APLL1_DIV_PD, "apll1_ck_div_pd", "apll1_ck_div", 0),

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