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Searched refs:CLK_TOP_APLL1_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt7622-clk.h99 #define CLK_TOP_APLL1_SEL 87 macro
/linux/drivers/clk/mediatek/
A Dclk-mt7622.c593 MUX(CLK_TOP_APLL1_SEL, "apll1_ck_sel", apll1_ck_parents,

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