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Searched refs:CLK_TOP_APLL2 (Results 1 – 13 of 13) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8516-clk.h69 #define CLK_TOP_APLL2 37 macro
A Dmt8173-clk.h36 #define CLK_TOP_APLL2 26 macro
A Dmt2712-clk.h79 #define CLK_TOP_APLL2 48 macro
A Dmt8192-clk.h117 #define CLK_TOP_APLL2 105 macro
A Dmt8195-clk.h105 #define CLK_TOP_APLL2 93 macro
/linux/Documentation/devicetree/bindings/sound/
A Dmt8195-afe-pcm.yaml144 <&topckgen 166>, //CLK_TOP_APLL2
/linux/drivers/clk/mediatek/
A Dclk-mt8516.c62 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
A Dclk-mt8195-topckgen.c1081 MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL2, "top_apll2",
A Dclk-mt8167.c70 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
A Dclk-mt8173.c64 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
A Dclk-mt8192.c68 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
A Dclk-mt2712.c142 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi876 <&topckgen CLK_TOP_APLL2>;

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