Searched refs:CLK_TOP_APLL2_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt7622-clk.h	100 #define CLK_TOP_APLL2_SEL 88 macro
A D	mt2712-clk.h	171 #define CLK_TOP_APLL2_SEL 140 macro
/linux/drivers/clk/mediatek/
A D	clk-mt7622.c	595 MUX(CLK_TOP_APLL2_SEL, "apll2_ck_sel", apll1_ck_parents,
A D	clk-mt2712.c	830 MUX_GATE(CLK_TOP_APLL2_SEL, "apll2_sel",

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