Home
last modified time | relevance | path

Searched refs:CLK_TOP_AUD_ENGEN2_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8516-clk.h179 #define CLK_TOP_AUD_ENGEN2_SEL 147 macro
A Dmt8192-clk.h56 #define CLK_TOP_AUD_ENGEN2_SEL 44 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8516.c399 MUX(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel", aud_engen2_parents,
A Dclk-mt8167.c589 MUX(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel", aud_engen2_parents,
A Dclk-mt8192.c810 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN2_SEL, "aud_engen2_sel",

Completed in 13 milliseconds