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Searched refs:CLK_TOP_AXI_MFG_IN_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8167-clk.h65 #define CLK_TOP_AXI_MFG_IN_SEL (CLK_TOP_NR_CLK + 41) macro
A Dmt8173-clk.h122 #define CLK_TOP_AXI_MFG_IN_SEL 112 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8167.c579 MUX(CLK_TOP_AXI_MFG_IN_SEL, "axi_mfg_in_sel", axi_mfg_in_parents,
A Dclk-mt8173.c583 MUX_GATE(CLK_TOP_AXI_MFG_IN_SEL, "axi_mfg_in_sel", axi_mfg_in_parents, 0x00b0, 16, 2, 23),

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