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Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
A Dmediatek-vcodec.txt64 <&topckgen CLK_TOP_CCI400_SEL>,
79 <&topckgen CLK_TOP_CCI400_SEL>,
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h118 #define CLK_TOP_CCI400_SEL 108 macro
A Dmt2712-clk.h155 #define CLK_TOP_CCI400_SEL 124 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8173.c578 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23),
833 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); in mtk_clk_enable_critical()
A Dclk-mt2712.c794 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1404 <&topckgen CLK_TOP_CCI400_SEL>,
1419 <&topckgen CLK_TOP_CCI400_SEL>,

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