Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/media/ |
A D | mediatek-vcodec.txt | 64 <&topckgen CLK_TOP_CCI400_SEL>, 79 <&topckgen CLK_TOP_CCI400_SEL>,
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/linux/include/dt-bindings/clock/ |
A D | mt8173-clk.h | 118 #define CLK_TOP_CCI400_SEL 108 macro
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A D | mt2712-clk.h | 155 #define CLK_TOP_CCI400_SEL 124 macro
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8173.c | 578 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23), 833 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); in mtk_clk_enable_critical()
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A D | clk-mt2712.c | 794 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8173.dtsi | 1404 <&topckgen CLK_TOP_CCI400_SEL>, 1419 <&topckgen CLK_TOP_CCI400_SEL>,
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