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Searched refs:CLK_TOP_ETHIF_SEL (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm/boot/dts/
A Dmt7623a.dtsi34 clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
A Dmt2701.dtsi158 <&topckgen CLK_TOP_ETHIF_SEL>;
616 <&topckgen CLK_TOP_ETHIF_SEL>;
656 <&topckgen CLK_TOP_ETHIF_SEL>;
736 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
A Dmt7623.dtsi280 <&topckgen CLK_TOP_ETHIF_SEL>;
770 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
867 <&topckgen CLK_TOP_ETHIF_SEL>;
908 <&topckgen CLK_TOP_ETHIF_SEL>;
968 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
/linux/include/dt-bindings/clock/
A Dmt2701-clk.h121 #define CLK_TOP_ETHIF_SEL 110 macro
/linux/Documentation/devicetree/bindings/net/
A Dmediatek-net.txt59 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
/linux/drivers/clk/mediatek/
A Dclk-mt2701.c569 MUX_GATE(CLK_TOP_ETHIF_SEL, "ethif_sel", ethif_parents,
/linux/Documentation/devicetree/bindings/pci/
A Dmediatek-pcie.txt99 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,

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