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Searched refs:CLK_TOP_I2S0_MCK_DIV_PD (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt7622-clk.h115 #define CLK_TOP_I2S0_MCK_DIV_PD 103 macro
/linux/drivers/clk/mediatek/
A Dclk-mt7622.c440 GATE_TOP0(CLK_TOP_I2S0_MCK_DIV_PD, "i2s0_mck_div_pd", "i2s0_mck_div",
/linux/arch/arm64/boot/dts/mediatek/
A Dmt7622.dtsi617 <&topckgen CLK_TOP_I2S0_MCK_DIV_PD>,

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