Searched refs:CLK_TOP_MEM_SEL (Results 1 – 14 of 14) sorted by relevance
/linux/include/dt-bindings/clock/ |
A D | mt8135-clk.h | 89 #define CLK_TOP_MEM_SEL 78 macro
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A D | mt7629-clk.h | 84 #define CLK_TOP_MEM_SEL 74 macro
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A D | mt7622-clk.h | 69 #define CLK_TOP_MEM_SEL 57 macro
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A D | mt6765-clk.h | 132 #define CLK_TOP_MEM_SEL 97 macro
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A D | mt8173-clk.h | 93 #define CLK_TOP_MEM_SEL 83 macro
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A D | mt2712-clk.h | 131 #define CLK_TOP_MEM_SEL 100 macro
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A D | mt2701-clk.h | 89 #define CLK_TOP_MEM_SEL 78 macro
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/linux/drivers/clk/mediatek/ |
A D | clk-mt7629.c | 489 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 594 clk_prepare_enable(clk_data->clks[CLK_TOP_MEM_SEL]); in mtk_topckgen_init()
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A D | clk-mt7622.c | 517 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 640 clk_prepare_enable(clk_data->clks[CLK_TOP_MEM_SEL]); in mtk_topckgen_init()
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A D | clk-mt8173.c | 543 MUX(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0040, 8, 1), 831 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_MEM_SEL]); in mtk_clk_enable_critical()
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A D | clk-mt8135.c | 375 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0158, 0, 2, 7),
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A D | clk-mt2701.c | 490 MUX_GATE_FLAGS(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
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A D | clk-mt2712.c | 740 MUX_GATE_FLAGS(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x040, 8, 1,
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A D | clk-mt6765.c | 370 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
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Completed in 29 milliseconds