Searched refs:CLK_TOP_MFG_SEL (Results 1 – 13 of 13) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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| A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
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| A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8135.c | 355 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0140, 16, 4, 23),
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| A D | clk-mt2701.c | 501 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents,
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| A D | clk-mt8173.c | 550 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0050, 24, 4, 31),
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| A D | clk-mt2712.c | 751 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel",
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| A D | clk-mt6765.c | 380 MUX_GATE_CLR_SET_UPD(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, CLK_CFG_1,
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| /linux/arch/arm/boot/dts/ |
| A D | mt2701.dtsi | 157 <&topckgen CLK_TOP_MFG_SEL>,
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| A D | mt7623.dtsi | 279 <&topckgen CLK_TOP_MFG_SEL>,
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt2712e.dtsi | 286 <&topckgen CLK_TOP_MFG_SEL>,
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