Searched refs:CLK_TOP_MSDC30_2_SEL (Results 1 – 10 of 10) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 82 #define CLK_TOP_MSDC30_2_SEL 71 macro
|
| A D | mt8173-clk.h | 108 #define CLK_TOP_MSDC30_2_SEL 98 macro
|
| A D | mt2712-clk.h | 145 #define CLK_TOP_MSDC30_2_SEL 114 macro
|
| A D | mt2701-clk.h | 101 #define CLK_TOP_MSDC30_2_SEL 90 macro
|
| A D | mt8192-clk.h | 38 #define CLK_TOP_MSDC30_2_SEL 26 macro
|
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8135.c | 365 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0148, 8, 3, 15),
|
| A D | clk-mt2701.c | 517 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents,
|
| A D | clk-mt8173.c | 562 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_2_parents, 0x0080, 0, 3, 7),
|
| A D | clk-mt8192.c | 769 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",
|
| A D | clk-mt2712.c | 772 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",
|
Completed in 21 milliseconds