Searched refs:CLK_TOP_MUX_AUD_2 (Results 1 – 8 of 8) sorted by relevance
/linux/sound/soc/mediatek/mt8183/ |
A D | mt8183-afe-clk.c | 32 CLK_TOP_MUX_AUD_2, enumerator 71 [CLK_TOP_MUX_AUD_2] = "top_mux_aud_2", 314 __func__, aud_clks[CLK_TOP_MUX_AUD_2], ret); in apll2_mux_setting() 317 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 321 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 352 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 356 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 360 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting() 371 clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 373 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting() [all …]
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/linux/sound/soc/mediatek/mt8192/ |
A D | mt8192-afe-clk.c | 32 [CLK_TOP_MUX_AUD_2] = "top_mux_aud_2", 148 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting() 151 __func__, aud_clks[CLK_TOP_MUX_AUD_2], ret); in apll2_mux_setting() 154 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 158 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 189 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 193 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting() 197 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting() 571 CLK_TOP_MUX_AUD_1 : CLK_TOP_MUX_AUD_2; in mt8192_mck_enable()
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A D | mt8192-afe-clk.h | 189 CLK_TOP_MUX_AUD_2, enumerator
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/linux/include/dt-bindings/clock/ |
A D | mt6797-clk.h | 38 #define CLK_TOP_MUX_AUD_2 28 macro
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A D | mt8183-clk.h | 56 #define CLK_TOP_MUX_AUD_2 20 macro
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/linux/drivers/clk/mediatek/ |
A D | clk-mt6797.c | 367 MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
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A D | clk-mt8183.c | 655 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_2, "aud_2_sel",
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8183.dtsi | 1151 <&topckgen CLK_TOP_MUX_AUD_2>,
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