Searched refs:CLK_TOP_MUX_MSDC50_0_HCLK (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt6797-clk.h	26 #define CLK_TOP_MUX_MSDC50_0_HCLK 16 macro
A D	mt8183-clk.h	43 #define CLK_TOP_MUX_MSDC50_0_HCLK 7 macro
/linux/drivers/clk/mediatek/
A D	clk-mt6797.c	345 MUX(CLK_TOP_MUX_MSDC50_0_HCLK, "msdc50_0_hclk_sel",
A D	clk-mt8183.c	577 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_MSDC50_0_HCLK, "msdc50_hclk_sel",

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